Senior/Principal TCAD Engineer, Texas Institute for Electronics Full-time

Senior/Principal TCAD Engineer, Texas Institute for Electronics

Texas Institute for Electronics (TIE) is a transformative, well-funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative.

A key part of our mission is to advance the state of the art in 3D heterogeneous integration (3DHI), chiplet-based architectures, and multi-component microsystems- catalyzing breakthroughs across microelectronics, artificial intelligence, quantum computing, high-performance computing, and next-generation healthcare devices.

Backed by $1.4 billion in combined funding from DARPA, Texas state initiatives, and strategic partners, we are building foundational capabilities in advanced packaging and integrated design infrastructure to restore U.S. leadership in microelectronics manufacturing.

TIE's 3DHI and chiplet integration platforms integrate novel thermal management and advanced interconnect solutions to deliver unprecedented performance and energy efficiency. Operating at the intersection of defense electronics and commercial markets, TIE offers a rare opportunity to reimagine an industry from the ground up and build transformative products with global impact.

UT Austin, recognized by Forbes as one of America's Best Large Employers, provides outstanding employee benefits and total rewards packages that include:

• Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
• Voluntary Vision, Dental, Life, and Disability insurance options
• Generous paid vacation, sick time, and holidays
• Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
• Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
• Flexible spending account options for medical and childcare expenses
• Robust free training access through LinkedIn Learning plus professional conference opportunities
• Tuition assistance
• Expansive employee discount program including athletic tickets
• Free access to UT Austin's libraries and museums with staff ID card
• Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card

Develop and validate multi-physics, silicon-calibrated TCAD models for 3DHI devices and interfaces to predict performance and reliability. Partners across teams and external vendors co-optimize designs, set modeling best practices, deliver reusable reference flows, and mentor engineers.

• Develop and own TCAD modeling frameworks for advanced devices and interfaces relevant to 3DHI, including hybrid bonding contacts, TSVs, BEOL interconnects, and emerging device structures.
• Perform multi-physics simulations (electrical, thermal, mechanical, and reliability) to predict performance, variability, and failure mechanisms across stacked, heterogeneous die systems.
• Co-optimize devices, interconnect, and packaging designs by working closely with process integration, packaging, and circuit teams to close the loop between fabrication, measurement, and simulation.
• Calibrate and validate TCAD models using silicon data from wafer-level test vehicles and process monitors; drive model-to-hardware correlation across corners and stress conditions.
• Define simulation methodologies and best practices for 3D device and interface modeling (e.g., contact resistance, current crowding, electromigration, thermo-mechanical stress).
• Engage with foundry, EDA, and materials partners to influence next-generation TCAD tool features and process design enablement for 3D-stacked systems.
• Author technical documentation, modeling guidelines, and reference flows to support ecosystem adoption of TIE's device and interface platforms.
• Mentor junior engineers and technical staff, setting standards for modeling rigor and engineering judgment across the organization.

Ph.D. or M.S. in Electrical Engineering, Materials Science, Applied Physics, or a closely related field with strong emphasis on device physics and numerical simulation.

• 8+ years (Senior) or 12+ years (Principal) of hands-on experience with TCAD for semiconductor devices or interconnects.
• Deep understanding of semiconductor device physics (MOSFETs, diodes, contacts) and transport mechanisms relevant to nanoscale and 3D structures.
• Proficiency with commercial TCAD tools such as Synopsys Sentaurus, Silvaco Atlas/Victory, or equivalent multi-physics simulation environments.
• Experience correlating TCAD models with silicon data and extracting physical parameters from measurements.
• Strong background in process integration effects (doping, defects, interfaces, stress, and materials).
• Ability to work cross-functionally with process, packaging, EDA, and system teams in a fast-moving R&D environment.

Relevant education and experience may be substituted as appropriate.

• Experience modeling 3D integration features such as hybrid bonding interfaces, TSVs, or wafer-to-wafer/die-to-wafer stacks.
• Familiarity with reliability physics (electromigration, TDDB, stress migration, thermal cycling) in advanced interconnects or contacts.
• Exposure to advanced materials systems (Cu-Cu bonding, barrier/liner stacks, low-k dielectrics, compound semiconductors).
• Knowledge of compact model extraction and linkage between TCAD and SPICE-level models.
• Publication or patent record in semiconductor device modeling, interconnect physics, or advanced packaging.
• Strong technical writing and presentation skills for industry and defense-sector collaborations.

TIE pays industry-competitive salaries

• May work around standard office conditions
• Repetitive use of a keyboard at a workstation
• Use of manual dexterity (ex: using a mouse)
• Location: Austin, Texas is preferred for close collaboration with our engineering teams and partners. Hybrid work arrangements may be possible, with travel up to 30–50% as needed. (Any flexible arrangement would be subject to university policies and approval regarding employment laws and regulations.)

Monday – Friday

• Resume/CV
• 3 work references with their contact information; at least one reference should be from a supervisor