Design Engineer I – II or Senior Design Engineer, Texas Institute for Electronics Full-time

Design Engineer I – II or Senior Design Engineer, Texas Institute for Electronics

The Texas Institute for Electronics (TIE) is a public-private partnership of preeminent semiconductor systems and defense electronics companies, national labs, and academic institutions. Our mission is to advance the state-of-the-art in critical semiconductor domains such as advanced packaging, and in the process to help restore U.S. leadership in semiconductor manufacturing. We are developing cutting-edge semiconductor manufacturing equipment and processes that will define future roadmaps of semiconductor logic, memory, heterogeneous integration, chip cooling, etc. We are seeking a number of motivated individuals to join our team and help us in achieving the above goals.

TIE is part of the Cockrell School of Engineering at The University of Texas at Austin (UT Austin), a global leader in technology innovation and engineering education for over a century. With 11 undergraduate and 13 graduate programs, over 20 research centers and a faculty community that boasts one of the highest number of National Academy of Engineering members among U.S. universities, Texas Engineering has launched some of the nation's most accomplished leaders and pioneered world-changing solutions in virtually every industry, from space exploration to energy to health care. Situated in the heart of Austin — named “America's Coolest City” by Expedia and “The Best Place to Live in the U.S.” by U.S. News and World Report — the Cockrell School embodies the city's innovative spirit. Major companies with Austin campuses, such as Dell, National Instruments, Apple, IBM, Samsung, Google, Tesla, and many others, continue to recruit Cockrell School students at a remarkable rate, launching thousands of successful careers and developing Texas Engineers into industry leaders.

At UT Austin, we say “What starts here changes the world.” As a member of the university community, you will be part of an organization that is internationally recognized for our academic programs and research. Your work will have meaning and make a difference not only in the lives of our faculty, staff, and students, but also those who are impacted by our first class academic and research programs.

UT Austin, recognized by Forbes as one of America's Best Large Employers, provides outstanding employee benefits and total rewards packages that include:

• Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
• Voluntary Vision, Dental, Life, and Disability insurance options
• Generous paid vacation, sick time, and holidays
• Teachers Retirement System of Texas, a defined benefit retirement plan, with 7.75% employer matching funds
• Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
• Flexible spending account options for medical and childcare expenses
• Robust free training access through LinkedIn Learning plus professional conference opportunities
• Tuition assistance
• Expansive employee discount program including athletic tickets
• Free access to UT Austin's libraries and museums with staff ID card
• Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card

Multiple vacancies available. This position may be filled at a higher-level title, relative to the experience and qualifications of the selected candidate. Applicants must be authorized to work in the United States on a full-time basis for any employer without sponsorship. Relocation assistance may be available.

We are bringing advanced semiconductor 3DHI packaging/manufacturing back to the USA and looking for motivated individuals to join our team.

Position Purpose

Design and develop innovative semiconductor circuits and test structures to support TIE's facility manufacturing highly reliable and leading edge 2.5D & 3D packaging solutions. Support multi-material (Silicon, III-V, Glass…) and multi-domain (Analog/Digital, RF, Power, Thermal, Mechanical Stress, Signal Integrity…) design, modeling, and production.

Responsibilities

• Design and develop mixed signal circuits, test vehicles, and test structures to support the development of TIE's 3D-ADK (Assembly Design Kit)
• Help develop workflows, 2.5D/3D modeling methods, and standard cells to comprehend and optimize Power/Thermal/Mechanical/Signal Integrity/RF impacts of multi-chiplet, heterogeneous micro-systems.
• Work with Product and Test engineering teams to comprehend and design in requirements to ensure performance, yield, reliability, and support BIST (Built in Self-Test) methodologies.
• Collaborate closely with EDA vendors and their tool/modeling solutions to evaluate effectiveness & drive improvements in their tool offerings and capability. Develop and implement advanced models to analyze and predict the effects of semiconductor packaging on device performance, reliability, and lifetimes.
• Improve automation of circuits and layouts to support standard cells and structures using Python, C+/+, MATLAB or other scripting languages.
• Participate in industry'design standards ' workshops & consortiums to promote an open access 3DHI manufacturing chiplet eco-system. Bring key aspects back into TIE designs and workflows to ensure we are compatible with industry trends.
• Collaborate with internal and external design teams to ensure package compatibility with semiconductor die and system-level requirements.
• Design and execute experiments to evaluate and optimize packaging performance, reliability, and manufacturability.
• Conduct rigorous simulation and 3DHI modeling studies to verify the performance, reliability, and testability of semiconductor packaging designs. (multi-physics modeling includes: Power, Thermal, Mechanical, Signal Integrity, RF, Analog/Digital per formance)
• Stay current with industry trends and emerging technologies in semiconductor packaging and design integration to drive innovation and continuous improvement.

Required Qualifications

• Design Engineer I: Bachelor's degree in Electrical Engineering, Semiconductor Physics, Materials Science, or related field.
• Design Engineer II: Bachelor's degree in Electrical Engineering, Semiconductor Physics, Materials Science, or related field and a minimum of three years of relevant industry experience.
• Senior Design Engineer: Bachelor's degree in Electrical Engineering, Semiconductor Physics, Materials Science, or related field and a minimum of ten years of relevant industry experience.
• Strong understanding of semiconductor device physics and mixed signal circuit design.
• Excellent problem-solving skills and attention to detail.
• Strong communication and teamwork skills, with the ability to collaborate effectively with cross-functional teams.
• Ability to thrive in a fast-paced environment and manage multiple projects simultaneously.
• Proficiency in EDA software for circuit and/or package design. (for Eng II, or Senior)

Relevant education and/or industry experience may be substituted as appropriate.

Preferred Qualifications

• Master's degree or Doctoral degree in semiconductor engineering fields such as Electrical Engineering, Semiconductor Physics, or other relevant disciplines.
• Prior experience in semiconductor design, product engineering, Test, or process integration.
• Experience with semiconductor Packaging: Power/thermal IC, Stress/strain interconnect optimization, or fan-in/out substrate design.
• Solid understanding of semiconductor packaging technologies, including wire bonding, flip-chip, wafer-level packaging, and 3D integration a plus.
• Strong background or interest in DFT/DFM (Design For Test/Manufacturing) methodologies and Built-In Self-Test (BIST) techniques.
• Experience in a startup or research and development (R&D) environment

Salary Range

TIE Pays Industry Competitive Salaries

Working Conditions

• Work is performed on-site in a scientific research environment and prototyping facility with dynamic work conditions collaborating simultaneously with many partners/customers in parallel.
• Work outside standard office hours could be required on an occasional basis during peak periods and special events.

Required Materials

• Resume/CV
• 3 work references with their contact information; at least one reference should be from a supervisor
• Letter of interest