Integration Engineer or Senior Integration Engineer, Texas Institute for Electronics Full-time

Integration Engineer Or Senior Integration Engineer

The Texas Institute for Electronics (TIE) is a public-private partnership of preeminent semiconductor systems and defense electronics companies, national labs, and academic institutions. Our mission is to advance the state-of-the-art in critical semiconductor domains such as advanced packaging, and in the process to help restore U.S. leadership in semiconductor manufacturing. We are developing cutting-edge semiconductor manufacturing equipment and processes that will define future roadmaps of semiconductor logic, memory, heterogenous integration, chip cooling, etc. We are seeking a number of motivated individuals to join our team and help us in achieving the above goals.

TIE is part of the Cockrell School of Engineering at The University of Texas at Austin (UT Austin), a global leader in technology innovation and engineering education for over a century. With 11 undergraduate and 13 graduate programs, over 20 research centers and a faculty community that boasts one of the highest number of National Academy of Engineering members among U.S. universities, Texas Engineering has launched some of the nation's most accomplished leaders and pioneered world-changing solutions in virtually every industry, from space exploration to energy to health care. Situated in the heart of Austin — named “America's Coolest City” by Expedia and “The Best Place to Live in the U.S.” by U.S. News and World Report — the Cockrell School embodies the city's innovative spirit. Major companies with Austin campuses, such as Dell, National Instruments, Apple, IBM, Samsung, Google, Tesla, and many others, continue to recruit Cockrell School students at a remarkable rate, launching thousands of successful careers and developing Texas Engineers into industry leaders.

At UT Austin, we say “What starts here changes the world.” As a member of the university community, you will be part of an organization that is internationally recognized for our academic programs and research. Your work will have meaning and make a difference not only in the lives of our faculty, staff, and students, but also those who are impacted by our first class academic and research programs.

UT Austin, recognized by Forbes as one of America's Best Large Employers, provides outstanding employee benefits and total rewards packages that include:

• Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
• Voluntary Vision, Dental, Life, and Disability insurance options
• Generous paid vacation, sick time, and holidays
• Teachers Retirement System of Texas, a defined benefit retirement plan, with employer matching funds
• Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
• Flexible spending account options for medical and childcare expenses
• Robust free training access through LinkedIn Learning plus professional conference opportunities
• Tuition assistance
• Expansive employee discount program including athletic tickets
• Free access to UT Austin's libraries and museums with staff ID card
• Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card

Purpose

The Integration Engineer or Senior Integration Engineer will focus on processing of test and demonstration vehicles in advanced Heterogeneous Integration projects. This role will initially involve toolset installation/qualification and evolve into establishing best known method (BKM) flows, characterizing performance and executing improvements to enhance yield and reliability.

Responsibilities

• Drive unit process engineers and tool / material vendors towards achieving defined targets for integrated test vehicles.
• Develop successful shortloop and full integrated processes to demonstrate various heterogeneous integration prototypes.
• Significant hands-on role within the cleanroom is expected, initially with shared ownership of critical unit processes.
• Define process window and resolve excursion through structured troubleshooting and investigation of failure modes.
• Design and evaluate results of experiments on test vehicles for mechanical / electrical performance and reliability.
• Able to work in a team environment, mentor junior engineers / students and communicate effectively.

Required Qualifications

Integration Engineer:

• Bachelor's degree in semiconductor engineering fields such as Electrical Engineering, Chemical Engineering, Materials Science or other relevant disciplines.
• Five years of relevant experience to include experience with Cu BEOL interconnects, including hands on experience with copper DD unit processes.
• Experience in W2W or D2WHB extremely preferred.

Senior Integration Engineer:

• Master's degree or Doctoral degree in semiconductor engineering fields such as Electrical Engineering, Chemical Engineering, Materials Science or other relevant disciplines
• 3 years of experience in semiconductor process engineering.
• Experience in W2W or D2WHB extremely preferred.

And:

• Working knowledge or experience with 3D ICs including various integration schemes.
• Extensive familiarity with standard inline metrology and failure analysis techniques.
• Experience with working on test vehicles to establish baseline processes.
• Ability to work in a cleanroom for extended periods of time to inspect, oversee and debug processes. This includes the ability to gown to applicable clean room standards.
• Experience with analysis and interpretation of BEOL parametric etest and reliability.
• Strong data analytical skills (JMP, Python etc.) and communication skills.

Relevant education and experience may be substituted as appropriate.

Preferred Qualifications

• 3 or more years of experience with unit processes in Copper CMP, particle free wet cleans or bonding.
• 10 or more years of experience in semiconductor process engineering.
• Experience in a startup or research and development (R&D) environment
• Experience with advanced technology nodes.
• Experience in test vehicle design, layout, and/or extraction of parametric results.

Salary Range

TIE Pays Industry Competitive Salaries

Working Conditions

• Work is performed on-site in a scientific research environment, with dynamic work conditions and frequent interruptions.
• Work is performed in a cleanroom environment, requiring the ability to gown to ISO Class 5 Clean Room standards.
• Work outside standard office hours could be required on an occasional basis during peak periods and special events.

Required Materials

• Resume/CV
• 3 work references with their contact information; at least one reference should be from a supervisor
• Letter of interest